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Artian-Apps
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Software manager for thinclient
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2024-02-14 09:30:33 +03:30 |
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699-pin Socket.png.jpg
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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699-pin connector.png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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Artian-server-structure.png
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This photo is for the document "Analysis of the main server board".
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2024-02-17 07:19:38 +03:30 |
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ArtianDes.png
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Add picture for test
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2023-11-29 08:08:43 +03:30 |
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Figure 2. Internal structure of the RTL8370 chip.png
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This photo is for the document "Analysis of the main server board".
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2024-02-17 07:19:38 +03:30 |
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Module-Carrier Board.png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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PCB-ThinClient-image.png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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Picture1.png
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This photo is for the HTTP Server document
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2024-02-14 09:33:33 +03:30 |
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Picture2.png
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This photo is for the HTTP Server document
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2024-02-14 09:33:33 +03:30 |
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Picture3.png
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This photo is for the HTTP Server document
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2024-02-14 09:33:33 +03:30 |
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Schematic-699 pin.png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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Table (1) Configure Pins.png
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This Table is for the document "Analysis of the main server board".
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2024-02-17 07:42:12 +03:30 |
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table1( Description ).png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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table1-1.png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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table1.png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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table2( Description ).png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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table2-1.png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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table2.png
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This photo is for the HTTP Server document
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2024-02-14 15:08:32 +03:30 |
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شکل 1. All signals in the DATA 6 Group are routed “the same way”, using the same topology and layer transitions..png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 2. Blankets and PCB directives are used to create net class groups for DDR3 routing guidelines..png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 3. Assigning different colors to each group can make routing easier to mentally follow..png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 4. Choosing a correct via size can help save space for more tracks..png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 5. Two or three tracks can fit between microvias, in the same space needed for one track between Through Hole Vias..png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 6. Some of the Address, Command, and Control tracks have to be routed under the pads of the “closest groups”..png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 7. Free space left under groups routed with microvias can be used to fanout the “closest groups”..jpg
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 8..png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 9. Fly-by topology for DDR layout and routing.png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 10. Double-T topology for DDR layout and routing.png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
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شکل 11. The DQS lines in this SODIMM module are routed on the same layer.png
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This picture is for the document " Comparison of FLY-by architecture with T-Double in PCB layout routing for DDR4 memory ".
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2024-02-17 08:41:13 +03:30 |
